The basic purpose of packaging electronic components is to protect the components while at the same time providing electrical interconnections from the components through the package. Manufacturability and protection are key concerns. Due to ongoing market demand, electronic packages are continuously being driven toward smaller sizes and reduced footprints while still being environmentally robust. Even though these electronic packages are miniaturized they are still highly functional.
Embedded electronics packaging integration requires dielectric material with compatible processing temperatures, compatible material properties and favorable electrical characteristics. Currently, several embedded technologies have been demonstrated using laminate and polymeric circuit boards.
Intel Corporation has developed a bumpless build-up layer that does not use solder bumps to attach the semiconductor die to the package wires. Build-up layers are grown or built-up around the semiconductor die. The build up layers are usually manufactured separately and then bonded together. An integrated module board (IMB) has been developed by Imbera Electronics OY where the component to be embedded has contact terminals on both sides of the component so that space is saved. General Electric Company has a Chips First Build-Up™ where a solderless process is used. Fraunhofer IZM uses a laminated embedded die “Chip in Polymer” packaging approach based upon standard circuit board equipment and techniques where a semiconductor die is bonded to a substrate, laminated with a dielectric, and linked to external circuitry. Casio Computer Co. Ltd. uses Wafer Level Packaging (WLP) where the package is completed directly on the wafer and then singulated by dicing for assembly. All packaging and testing operations of the dies are replaced by whole wafer fabrication and wafer level testing.
None of the above approaches make use of a liquid crystal polymer material (LCP), which has gained considerable attention since becoming commercially available in 2003. LCP materials have very low moisture permeability and can provide a near-hermetic seal without being relatively thick. Moreover, the dielectric properties of LCP materials do not change upon exposure to moisture.
An LCP package for protecting a semiconductor die is disclosed in the article titled “Packaging of MMICs in Multilayer LCP Substrates” by Thompson et al. As illustrated in FIG. 1, an electronic package 20 includes a semiconductor die 22 embedded between LCP layers 30-42 using a lamination process with a cut-out cavity 50 for the semiconductor die. LCP core layers 30, 34, 38 and 42 are 4 mils thick, whereas LCP bond layers 32, 36 and 40 are 2 mils thick. As discussed in the article, the low melting temperature (285° C.) LCP bond layers 32, 36 and 40 are used to adhere the generally thicker higher melting temperature (315° C.) LCP core layers 30, 34, 38 and 42 to create a homogeneous LCP electronic package 20.
Even in view of the above-described technologies, emerging wireless communication and sensor applications require ultra thin, flexible, chemically resistant, near-hermetic and affordable embedded electronic packages. This is particularly so when directed to biomedical sensing and imaging, for example. Consequently, there is still a need to improve upon embedding a semiconductor die in an electronic package.